Most of error correction codes (ECCs) are designed to correct random channel errors. The decoder performance usually suffers from burst channel errors with long runs. Channel interleaving is employed to average the burst channel errors to improve performance. At the transmitter side, channel interleaving scrambles encoded bits such that the effect of a long channel fading is distributed over an entire coding block and thus the run length of each burst channel error in one coding block is largely reduced at the receiver side.
FIG. 1 (Prior Art) is a block diagram of an interleaving scheme for channel encoding adopted in IEEE 802.16e wireless systems. In IEEE 802.16e wireless systems, convolutional turbo code (CTC) interleaver is used for channel encoding. As illustrated in FIG. 1, CTC interleaver 11 comprises a bit separation module 12, a subblock interleaver 13, and a bit-grouping module 14. Bit separation module 12 receives all encoded bits from CTC encoder and distributes the encoded bits into several information subblocks A and B, and several parity subblocks Y1, Y2, W1 and W2. Subblock interleaver 13 interleaves all subblocks independently. Bit-grouping module 14 multiplexes the interleaved subblocks and regroups them into subblocks A, B, Y and W.
In IEEE 802.16e, the entire subblock of bits to be interleaved is written into an array at addresses from 0 to the number of bits minus one (N−1), and the interleaved bits are read out in a permuted order with the i-th bit being read from address ADi (i=0 . . . N−1). The formula of subblock interleaver 13 is given as follows:Tk=2m(k mod J)+BROm(└k/J┘)  (1)where Tk is a tentative output address, m and J are subblock interleaver parameters, BROm(y) indicates the bit-reversed m-bit value of y (i.e., BRO3(6)=3). If Tk is less than N, then ADi=Tk and increment i and k by 1; otherwise discard Tk and increment k only. The above subblock interleaving procedure is repeated until all N interleaver output addresses are obtained.
The interleaved bits are then modulated and transmitted at the transmitter side. At the receiver side, the received bits are de-modulated, de-interleaved, and then decoded by a CTC decoder. In high-order modulation schemes (e.g., 16 QAM and 64 QAM where modulation symbols carry more than two bits), different bits have different error probabilities because there are multiple level of bit reliabilities in one modulation symbol. As a result, two problems arise using the IEEE 802.16e CTC interleaving scheme with high-order modulation. First, based on the subblock interleaving equation (1), adjacent encoded bits in each subblock are mapped onto the same bit reliability. This problem is also referred to as intra-block continuity as depicted in FIG. 1, where adjacent encoded bits 0, 1, 2 in subblock A are all mapped to high bit reliability H. Second, because each subblock is interleaved based on the same interleaving equation, multiple bits with the same index in different subblocks may be mapped onto the same bit level. This problem is also referred to as inter-block continuity as depicted in FIG. 1, where the same bits 93 in different subblocks A and B are all mapped to low bit reliability L.
FIG. 2 (Prior Art) illustrates intra-block continuity problem with more detail. FIG. 2 comprises a diagram of subblock A after subblock interleaving and a 16 QAM constellation map 21. The interleaved subblock A is supplied to a symbol mapper using a selected modulation scheme. Under 16 QAM modulation scheme, each modulation symbol carries four bits b0b1b2b3, with b0 and b2 have high bit reliability H, and b1 and b3 have low bit reliability L. As illustrated in FIG. 2, based on the subblock interleaving equation (1), adjacent bits in subblock A are all mapped onto the same bit reliability. For example, bits 0-31, 96-160 are mapped to H, and bits 32-95, 161-191 are mapped to L.
FIG. 3 (Prior Art) illustrates inter-block continuity problem with more detail. FIG. 3 comprises a CTC encoder 31 and a 64 QAM constellation map 32. CTC Encoder 31 takes a pair of input bits A and B and generates a set of encoded bits A, B, Y1, W1, Y2, and W2 on a set-by-set basis. Each set of the encoded bits are interleaved and then supplied to a symbol mapper using a selected modulation scheme. In 64 QAM, each modulation symbol carries six bits b0b1b2b3b4b5, with b0 and b3 have high bit reliability H, b1 and b4 have medium reliability M, and b2 and b5 have low bit reliability L. As illustrated in FIG. 3, because all subblocks are interleaved based on the same interleaving equation, the same set of encoded bits are mapped onto the same bit reliability. For example, the same bits 93 in both subblocks A and B are mapped to L.
Because of the intra-block and inter-block continuity problems, the IEEE 802.16e channel interleaver induces burst errors and consequently its decoder performance suffers. It is thus desirable to prevent mapping adjacent encoded bits within each subblock onto the same level of bit reliability, and also desirable to prevent mapping multiple encoded bits with the same index in different subblocks onto the same level of bit reliability.